1. Field of Invention
The present invention is directed to a programmable transmitter, in particular, a transmitter architecture designed to accommodate multiple types of envelope modulation.
2. Discussion of Related Art
Modern modulation techniques that are part of the transceiver architecture of a wireless communication system can generally be classified as belonging to either non-constant (variable) or constant envelope modulation schemes. One example of a widely used non-constant envelope modulation scheme is the EDGE (Enhanced Data Rate for GSM Evolution) standard that was introduced with the intent to improve the data speed of GSM (Groupe Special Mobile) networks from 270.833 kilobits per second (kbps) to 812.5 kbps. EDGE utilizes a 3π/8 eight-Phase Shift Key (PSK) modulation. Some other examples of non-constant envelope modulation schemes include Code Division Multiple Access 2000 (CDMA2k), Universal Mobil Telecommunications Systems (UMTS), integrated Digital Enhanced Networks (iDEN), High Speed Downlink Packet Access (HSDPA), and Wireless Fidelity (WiFi) networks as defined by the various 802.11 standards. As an alternative, some communication standards use so-called constant envelope modulation, which generally relies on such schemes as FSK (Frequency Shift Keying), GFSK (Gaussian Frequency Shift Keying), MSK (Minimum Shift Keying), and GMSK (Gaussian Minimum Shift Keying). Although constant envelope modulation is not as bandwidth efficient as is non-constant envelope modulation, it is in world-wide use as part of the GSM wireless communication standard which uses GMSK modulation. Another popular communication standard that also uses constant envelope modulation is the Digital European Cordless Telecommunications (DECT) standard.
A constant envelope modulator in a wireless communication system may generally use a voltage controlled oscillator (VCO) embedded in a phase locked loop (PLL) circuit to achieve the frequency and/or phase modulation of signals. The PLL may typically include a phase frequency detector (PFD), a charge pump, a loop filter, a VCO, and a programmable fractional-N frequency divider. The digital divider is used to select the channel and frequency band of operation. The frequency produced by the PLL must remain precisely controlled, with an accuracy ranging from 0.1 parts per million (ppm) for GSM to 25 ppm for DECT applications. A so-called sigma-delta (SD) modulator may be used to control the fractional-N frequency divider so as to achieve finer tuning accuracy, to generate spurious-free local oscillator (LO) frequencies and to permit faster frequency jumps as the channels are switched. An example of such a frequency synthesizer including a sigma-delta modulator is described in U.S. Pat. No. 6,700,447 to Nilsson entitled “TRIMMING OF A TWO POINT PHASE MODULATOR,” which is herein incorporated by reference.
When using a PLL, the modulation bandwidth is limited by the PLL filter bandwidth. Making the loop filter bandwidth larger to accommodate wider modulation bandwidths has a detrimental impact on the output noise, thus several approaches have been suggested to overcome this limitation. For example, one can pre-distort the high frequency portion of the signal to offset the attenuation of the loop filter. Alternatively, a so-called two-point modulation (TPM) approach can be implemented in which the same signal is applied both to the VCO tuning port as well as to the digital divider circuit.
One example of a phase-locked loop (PLL) frequency synthesizer employing a two-point modulation scheme using a sigma-delta modulator and fractional-N divider circuit is described in U.S. Patent Application 2003/043950 to Hansen et al. entitled “PHASE-LOCKED LOOP FREQUENCY SYNTHESIZER WITH TWO-POINT MODULATION,” which is herein incorporated by reference. The '950 application discloses that, in the synthesizer, data are modulated at both the PLL frequency divider and the voltage-controlled oscillator (VCO), and that the complementary frequency responses at these two modulation points allow the PLL bandwidth to be sufficiently narrow to attenuate phase noise from the phase detector, frequency divider, and SIGMADELTA quantization error, without adversely affecting the data. Another example of a two-point modulator including a PLL that can be operated at various reference frequencies is described in U.S. Patent Application 2005/041755 to Hammes entitled “TWO-POINT MODULATOR ARRANGEMENT AND USE THEREOF IN A TRANSMISSION ARRANGEMENT AND IN A RECEPTION ARRANGEMENT,” which is herein incorporated by reference. U.S. Pat. No. 6,774,738 to Hammes et al. entitled “TRIMMING METHOD FOR A TRANSCEIVER USING TWO-POINT MODULATION,” also incorporated herein by reference, describes another example of a transceiver having a PLL circuit that operates on a two-point modulation scheme, wherein the amplitude of an analog modulation signal is selected on the basis of a modulation shift of a defined digital modulation signal. The '738 patent discloses that a predetermined data sequence of the analog modulation signal is applied, the modulation shift of the analog modulation signal is determined, and the amplitude of the analog modulation signal is corrected to match the difference between the modulation shift of the digital modulation signal and the determined modulation shift of the analog modulation signal.
As mentioned above, many communication standards call for non-constant, rather than constant, envelope modulation. In many implementations, a non-constant envelope modulation scheme may use the frequency synthesizer of the transceiver to generate a local oscillator signal that can be applied to a quadrature mixer and RF (radio frequency) amplifier. For non-constant envelope modulation a direct quadrature modulator circuit can be employed. However, these circuits can suffer from several drawbacks. For example, in the well-known simple direct modulation transmitter, translation of the analog signal to a radio frequency signal is done in one or multiple stages, and special care must be exercised in order to ensure isolation between the power amplifier and the VCO (i.e., by minimizing coupling between the stages), otherwise cross-talk and VCO “pulling” may cause signal distortion.
An example of a dual-stage transmitter is described in U.S. Pat. No. 6,915,117 to Chominski et al. entitled “MULTISTAGE MODULATION ARCHITECTURE AND METHOD IN A RADIO,” which is herein incorporated by reference. The '117 patent discloses a transmitter in which the analog signal is modulated and mixed to produce a radio frequency output, and a separate mixing frequency signal is provided to each stage. A single frequency synthesizer is used and first and second divider circuits each receive the output of the frequency synthesizer and deliver a mixing signal to the first and second stages respectively.